Farzana Ahmed Siddique

I am a PhD Candidate in the Computer Science department at the University of Virginia (UVA). I am working under the supervision of Professor Kevin Skadron. My research focus lies in Computer Architecture. I am currenlty working on designing a flexible CPU cache architecture to better support both the regular and irregular memory access patterns. Before that I worked on automata processing and evaluated the potential of Deterministic Finite Automata (DFA) and Non-deterministic Finite Automata (NFA) on FPGA-based automata processing engine.
Bangladesh is my home country. I have completed my undergraduate in Computer Science and Engineering from Bangladesh University of Engineering and Technology (BUET). My undergraduate thesis supervisor was Professor Rifat Shahriyar. As a part of my undergad thesis I worked on parallelizing the Branch and Bound approximation algorithm for the Travelling Sales Man Problem (TSP).

Feel free to reach out to me via email at farzana at virginia dot edu

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Publications

1. Alif Ahmed, Farzana Ahmed Siddique, Kevin Skadron, "GraphTango: A Hybrid Representation Format for Efficient Streaming Graph Updates and Analysis ", arXiv preprint arXiv:2212.11935, 2022.

   Abstract

   Streaming graph processing involves performing updates and analytics on a time-evolving graph. The underlying representation format largely determines the throughputs of these updates and analytics phases. Existing formats usually employ variations of hash tables or adjacency lists. However, adjacency-list-based approaches perform poorly on heavy-tailed graphs, and the hash-based approaches suffer on short-tailed graphs. We propose GraphTango, a hybrid format that provides excellent update and analytics throughput regardless of the graph's degree distribution. GraphTango switches among three different formats based on a vertex's degree: i) Low-degree vertices store the edges directly with the neighborhood metadata, confining accesses to a single cache line, ii) Medium-degree vertices use adjacency lists, and iii) High-degree vertices use hash tables as well as adjacency lists. In this case, adjacency list provides fast traversal during the analytics phase, while the hash table provides constant-time lookups during the update phase. We further optimized the performance by designing an open-addressing-based hash table that fully utilizes every fetched cache line. In addition, we developed a thread-local lock-free memory pool that allows fast growing/shrinking of the adjacency lists and hash tables in a multi-threaded environment. We evaluated GraphTango with the help of the SAGA-Bench framework and compared it with four other representation formats. On average, GraphTango provides 4.5x higher insertion throughput, 3.2x higher deletion throughput, and 1.1x higher analytics throughput over the next best format. Furthermore, we integrated GraphTango with the state-of-the-art graph processing frameworks DZiG and RisGraph. Compared to the vanilla DZiG and vanilla RisGraph, [GraphTango + DZiG] and [GraphTango + RisGraph] reduces the average batch processing time by 2.3x and 1.5x, respectively.

2. Farzana Ahmed Siddique, Tommy James Tracy II, Nathan Brunelle, Kevin Skadron, "Deterministic vs. Non Deterministic Finite Automata in Automata Processing", arXiv preprint arXiv:2210.10077, 2022.

   Abstract

   Linear-time pattern matching engines have seen promising results using Finite Automata (FA) as their computation model. Among different FA variants, deterministic (DFA) and non-deterministic (NFA) are the most commonly used computation models for FA-based pattern matching engines. Moreover, NFA is the prevalent model in pattern matching engines on spatial architectures. The reasons are: i) DFA size, as in #states, can be exponential compared to equivalent NFA, ii) DFA cannot exploit the massive parallelism available on spatial architectures. This paper performs an empirical study on the #state of minimized DFA and optimized NFA across a diverse set of real-world benchmarks and shows that if distinct DFAs are generated for distinct patterns, #states of minimized DFA are typically equal to their equivalent optimized NFA. However, NFA is more robust in maintaining the low #states for some benchmarks. Thus, the choice of NFA vs. DFA for spatial architecture is less important than the need to generate distinct DFAs for each pattern and support these distinct DFAs' parallel processing. Finally, this paper presents a throughput study for von Neumann's architecture-based (CPU) vs. spatial architecture-based (FPGA) automata processing engines. The study shows that, based on the workload, neither CPU-based automata processing engine nor FPGA-based automata processing engine is the clear winner. If #patterns matched per workload increases, the CPU-based automata processing engine's throughput decreases. On the other hand, the FPGA-based automata processing engine lacks the memory spilling option; hence, it fails to accommodate an entire automata if it does not fit into FPGA's logic fabric. In the best-case scenario, the CPU has a 4.5x speedup over the FPGA, while for some benchmarks, the FPGA has a 32,530x speedup over the CPU.

3. Daehyeok Kim, Nikita Lazarev, Tommy Tracy, Farzana Ahmed Siddique, Hun Namkung, James C Hoe, Vyas Sekar, Kevin Skadron, Zhiru Zhang, and Srinivasan Seshan, "A Roadmap for Enabling a Future-Proof In-Network Computing Data Plane Ecosystem", arXiv preprint arXiv:2111.04563, 2021.

   Abstract

   As the vision of in-network computing becomes more mature, we see two parallel evolutionary trends. First, we see the evolution of richer, more demanding applications that require capabilities beyond programmable switching ASICs. Second, we see the evolution of diverse data plane technologies with many other future capabilities on the horizon. While some point solutions exist to tackle the intersection of these trends, we see several ecosystem-level disconnects today; e.g., the need to refactor applications for new data planes, lack of systematic guidelines to inform the development of future data plane capabilities, and lack of holistic runtime frameworks for network operators. In this paper, we use a simple-yet-instructive emerging application-data plane combination to highlight these disconnects. Drawing on these lessons, we sketch a high-level roadmap and guidelines for the community to tackle these to create a more thriving "future-proof" data plane ecosystem.

4. Muhammad Hussain Mahdi, Nafisa Anzum, Farzana Ahmed Siddique, Mohammad Rashidujjaman Rifat, Kazi Shahidullah, and A. B. M. Alim Al Islam, "A Tale of Institutional Education in Bangladesh: Students' Perspective", ICCIT, 2016.

   Abstract

   Education, i.e., the backbone of a nation, encompasses a variety of role players and stakeholders among which students are, perhaps, the most important one. However, analyzing students' feedback on institutional education system from a macro level is yet to be done in the literature. To address this issue, in this paper, we conduct a study on different perspectives of institutional education based on students' feedback. Here, we mostly focus on the institutional education in Bangladesh. Our study is based on the data collected from the students through both on-line and offline surveys. We analyze the collected data to dig out various key aspects such as appropriateness of educational contents, relationship between teachers and students, and extents of malpractice in the institutional education. Additionally, we attempt for identifying different personalities who exhibit significant influence on the students. Our study reveals a number of key findings that may facilitate effective reformation and enhancement of the current educational system under focus.

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